30 Aug '17, 4pm

Learn more about Celerity, an open source @risc_v SoC with a neural network accelerator fabric @eetimes

A binarized neural net accelerator block in Celerity. Click to enlarge. Of three academic papers on machine learning chips, the most intriguing was Celerity. Teams of grad students spread across four universities went from delivery of a 16nm TSMC PDK to tapeout of a 25mm2 device in nine months. Celerity packs into its 360 million transistors 511 RISC-V cores and a custom neural network accelerator. The cores are split into a 496-unit array running at 1.05 GHz and five Linux-capable Rocket cores along with the accelerator running at 625 MHz. The students claim an astounding 700-1,220x speedup by using specialty and many-core tiers in collaboration, compared to using either in isolation. They expect first silicon in September. The distributed team attributed its condensed design time and relatively miniscule $1.3 million budget to a mixture of factors. They relied heavily on...

Full article: http://www.eetimes.com/document.asp?_mc=RSS_EET_EDT&doc_i...

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16 Views of Hot Chips '17

eetimes.com 24 Aug '17, 10pm

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eetimes.com 24 Aug '17, 11pm

CUPERTINO, Calif. – At a Hot Chips event dominated by machine learning it was clear just about everyone is doing something...

via @eetimes

eetimes.com 25 Aug '17, 1am

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via @eetimes

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eetimes.com 23 Aug '17, 8pm

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eetimes.com 23 Aug '17, 6am

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eetimes.com 23 Aug '17, 4am

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via @eetimes

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eetimes.com 22 Aug '17, 1am

ThinCI, a five-year-old startup in California, presented Monday at the Hot Chips symposium the company’s “Graph Streaming ...