07 Dec '17, 6am

LETI integrates III-V lasers on 200mm wafers using CMOS flow

Leti has integrated hybrid III-V silicon lasers on 200mm wafers using standard CMOS process flow. This shows the way to transitioning away from 100mm wafers and a process based on bulk III-V technology that requires contacts with noble metals and lift-off based patterning. The project, carried out in the framework of the IRT Nanoelec program, which is headed by Leti, demonstrated that the hybrid device’s performance is comparable to the reference device fabricated with the current process on 100mm wafers. The fabrication flow is fully planar and compatible with large-scale integration on silicon-photonic circuits. CMOS compatibility with silicon photonics lowers fabrication costs, and provides access to mature and large-scale facilities, which enables packaging compatibility with CMOS driving circuits. “Silicon-photonic technologies are becoming more mature, but the main l...

Full article: https://www.electronicsweekly.com/news/business/leti-inte...

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