06 May '13, 1pm

Latest Release of #SNPS IC Compiler Introduces New Technologies to ... #SemiEDA #semIP

The IC Compiler 2013.03 release includes powerful new features to deliver even faster design closure. One important new capability is the application of final-stage ECOs to close the design. IC Compiler, working hand-in-hand with Synopsys' PrimeTime® signoff solution, provides a highly efficient ECO solution rooted in dual principles: first, ensuring that very few ECOs are required after the optimization steps; and second, applying the ECOs surgically with minimal layout perturbation. In this flow, PrimeTime provides signoff-accurate ECO guidance, implemented using the new minimum physical impact ECO capability, which greatly reduces layout perturbation by reusing wires and minimizing device displacement. Combined with a fully automatic, incremental In-Design physical verification capability, IC Compiler provides a significant reduction in turnaround time for ECO closure.

Full article: http://www.design-reuse.com/news/31991/synopsys-ic-compil...

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