30 Jun '13, 11am

"Secret sauce of #ARM's #bigLITTLE multi-processor architecture" via @electronicsweekly

Secret sauce of ARM’s big.LITTLE multi-processor architecture no comment richard wilson 2013/06/25 Modern mobile devices must support ever increasing performance requirements within a relatively flat power budget. CPU designers have responded with a series of innovations to enable the required efficiency improvements: dynamic voltage and frequency scaling (DVFS), dynamic clock gating, domain power gating, state retention idle modes, and more recently heterogeneous compute. Technology known as big.LITTLE from ARM is essentially a heterogeneous compute architecture that tightly combines two different but fully compatible CPU core types, a ‘big’ CPU tuned for maximum performance at good efficiency and a ‘LITTLE’ CPU tuned for good performance and maximum efficiency. Together, they form a highly efficient CPU subsystem that is capable of market-leading peak performance at lowe...

Full article: http://www.electronicsweekly.com/news/components/micropro...

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