How best to reduce power on future ICs: via @ee_times

How best to reduce power on future ICs

eetimes.com 21 Feb '12, 9pm

How best to reduce power on future ICs: via @ee_times

Excessive power consumption has become the chief roadblock to further scaling of semiconductors, threatening to stall advancement in all electronics sectors—everything from further miniaturizing mobile devices to revving supercomputers. While the causes are rooted in the immutable laws of physics and chemistry, engineers have devised a novel set of innovations that are mitigating the problem today and that promise to reinvigorate the chip industry tomorrow. Here are the top five ways to reduce power on future ICs. They are already in development, and collectively they hold the promise of solving the problem for good within the decade. Embrace co-design Electronic design automation tools can optimize for low power by enabling teams to co-design for it from the very beginning. In fact, the developers of lowest-power processors and systems-on-chip in the industry achieved the...

Full article: http://eetimes.com/electronics-news/4236645/How-to-reduce...

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