29 Aug '14, 9pm

Samsung Funds III-V FinFETs in US Lab | EE Times

Samsung Funds III-V FinFETs in US Lab | EE Times

PORTLAND, Ore. — Samsung is funding Pennsylvania State University researchers working to fabricate III-V indium gallium arsenide FinFETs for possible use at the 7nm node. The silicon FinFET (3D fin gates on field effect transistors) have become the standard for low leakage and high performance at advanced nodes, but III-V compounds such as indium gallium arsenide (InGaAs) are faster than silicon, prompting researchers at Penn State to combine the best of both worlds. Penn State's InGaAs FinFET transistors use a novel five-gate structure grown on an indium phosphide (InP) substrate in its Materials Research Institute's Nanofabrication Laboratory. "These FinFETs as of now have been fabricated on InP substrates," Arun Thathachary, a EE doctoral candidate working under professor Suman Datta, told us. "Samsung will own the IP generated from this project." Fellow doctoral candid...

Full article: http://www.eetimes.com/document.asp?doc_id=1323706

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