26 Apr '16, 10am

FPGAs get Hitless I/O for in-system hardware upgrade

FPGAs get Hitless I/O for in-system hardware upgrade

The new FPGAs offer expanded I/O and logic support for control PLD applications, while increased on-chip memory improves picture clarity for low cost video bridging in large monitor applications, says Lattice . Features include: Glue-less 1V I/O interface for out-of-band communication with performance processors and Hitless I/O for in-system hardware upgrade along with a switch over from its old configuration to the newly programmed configuration without interrupting the circuit board operation. The FPGA is password protected and a SED/SEC/SEI feature enables recovery from a soft error event in milliseconds. Device I/Os support 900Mbit/s operating speeds.

Full article: http://www.electronicsweekly.com/news/fpgas-get-hitless-i...

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