29 Jul '14, 11pm

ANSYS has chip package analysis solutions for power sign-off on #FinFET-based designs. Watch the video

Description: Interview with Aveek Sarkar, VP Customer Support & Product Engineering of ANSYS at 2014 Design Automation Conference.

Full article: http://www10.edacafe.com/video/ANSYS-Aveek-Sarkar-VP-Cust...

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*DAC 2014 Panel: Chip, Package, & Board Design ...

cadence.com 26 Jul '14, 4pm

SAN FRANCISCO--There were times-simpler times-when electronics designers toiled in distinct walled gardens: chip, package,...