28 Jun '16, 11am

PCI Express Is Handling More than Just Peripherals

PCI Express Is Handling More than Just Peripherals

Download this article in .PDF format This file type includes high resolution graphics and schematics when applicable. PCI Express (PCIe) Gen 3 is the mainstay for microprocessors. It scales by adding more lanes typically in an x1, x2, x4, x8, and x16 progression. Processor chips may use anywhere from one to more than a couple dozen lanes depending upon the bandwidth needed for a particular application. Related Content What’s the Difference Between M.2 Modules? Gaming PC: Overclocking or GPU NVMe Bids to Win the Storage Wars The high-speed serial PCIe interface superceded the parallel PCI bus as the foremost peripheral interface, although even the PCI predecessor, ISA, is still in use. Access to peripherals such as Ethernet adapters remains a focus for PCIe, but it can also be utilized as multiple-node interconnect fabric as well as an access mechanism for solid-state stora...

Full article: http://electronicdesign.com/microcontrollers/pci-express-...

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