27 Aug '16, 6pm

SERDES testing for rocket scientists:

SERDES testing for rocket scientists:

To support the development of high-throughput payloads, satellite manufacturers are exploiting the benefits of high-speed serial links to connect multiple FPGAs/ASICs on a single PCB and/or transfer data between modules. As bit rates increase, spacecraft OEMs are grappling with how to measure and characterise the performance and reliability of SERDES channels to ensure sub-systems are developed right-first time. Previously we discussed the use of IBIS-AMI simulation to predict the performance and signal integrity of high-speed serial links before manufacturing your PCB. In this post, I want to share some experiences of using a bit-error rate tester (BERT) to measure and validate the hardware operation of SERDES links. You have spent many months designing your latest avionics, the PCB has been fabricated and assembled, the initial, power-up commissioning and basic functiona...

Full article: http://www.edn.com/electronics-blogs/out-of-this-world-de...

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