30 Oct '12, 8pm

IBM, ARM and Cadence tapeout first 14nm finfet processor

Cadence Design Systems has announced the tapeout of a 14nm test-chip featuring an ARM Cortex-M0 processor implemented using IBM’s FinFET process technology. This is the result of a collaboration betwen ARM, Cadence and IBM to develop systems-on-chip (SoCs) at the 14nm process node. The chip was developed to validate the building blocks of foundation IP for 14nm design. It integrates the ARM processor, SRAM memory blocks and other blocks were included that provide the characterization data necessary for foundation IP development for FinFET-based ARM Artisan physical IP. “Each move to smaller geometry brings new challenges that require deep collaboration among ecosystem leaders in the SoC design chain,” said Dipesh Patel, vice president and general manager, Physical IP Division at ARM. “With 14nm design, many of these challenges center on FinFETs, and our work with Cadence a...

Full article: http://www.electronicsweekly.com/Articles/30/10/2012/5488...

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